%0 Conference Paper %1 conf/fmcad/WeiPYG13 %A Wei, Jijie %A Peng, Yan %A Yu, Ge %A Greenstreet, Mark R. %B FMCAD %D 2013 %I IEEE %K dblp %P 113-120 %T Verifying global convergence for a digital phase-locked loop. %U http://dblp.uni-trier.de/db/conf/fmcad/fmcad2013.html#WeiPYG13

@inproceedings{conf/fmcad/WeiPYG13, added-at = {2013-12-11T00:00:00.000+0100}, author = {Wei, Jijie and Peng, Yan and Yu, Ge and Greenstreet, Mark R.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2701c11b59d54aa3b6027ca83e4233d8e/dblp}, booktitle = {FMCAD}, crossref = {conf/fmcad/2013}, ee = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=6679399}, interhash = {7adabd027a14b695f689e72950a2fd2d}, intrahash = {701c11b59d54aa3b6027ca83e4233d8e}, keywords = {dblp}, pages = {113-120}, publisher = {IEEE}, timestamp = {2016-02-02T12:39:31.000+0100}, title = {Verifying global convergence for a digital phase-locked loop.}, url = {http://dblp.uni-trier.de/db/conf/fmcad/fmcad2013.html#WeiPYG13}, year = 2013 }