%0 Conference Paper %1 conf/asicon/YangXLS15 %A Yang, Zong %A Xu, Hui %A Li, Nan %A Sun, Zhaolin %B ASICON %D 2015 %I IEEE %K dblp %P 1-4 %T FPGA logic design of SATA3.0 physical layer. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#YangXLS15 %@ 978-1-4799-8485-5

@inproceedings{conf/asicon/YangXLS15, added-at = {2018-07-17T00:00:00.000+0200}, author = {Yang, Zong and Xu, Hui and Li, Nan and Sun, Zhaolin}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2a982d4159e91891e81bab362ea7aa0a8/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2015}, ee = {https://doi.org/10.1109/ASICON.2015.7517172}, interhash = {785cdfaeee5e1a5ec3187a6efde19122}, intrahash = {a982d4159e91891e81bab362ea7aa0a8}, isbn = {978-1-4799-8485-5}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-09-27T17:19:01.000+0200}, title = {FPGA logic design of SATA3.0 physical layer.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#YangXLS15}, year = 2015 }