%0 Conference Paper %1 conf/vlsid/HuangMTSZZCR02 %A Huang, Yu %A Mukherjee, Nilanjan %A Tsai, Chien-Chung %A Samman, Omer %A Zaidan, Yahya %A Zhang, Yanping %A Cheng, Wu-Tung %A Reddy, Sudhakar M. %B VLSI Design %D 2002 %I IEEE Computer Society %K dblp %P 511-516 %T Constraint Driven Pin Mapping for Concurrent SOC Testing. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2002.html#HuangMTSZZCR02 %@ 0-7695-1299-2

@inproceedings{conf/vlsid/HuangMTSZZCR02, added-at = {2015-04-20T00:00:00.000+0200}, author = {Huang, Yu and Mukherjee, Nilanjan and Tsai, Chien-Chung and Samman, Omer and Zaidan, Yahya and Zhang, Yanping and Cheng, Wu-Tung and Reddy, Sudhakar M.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2f488f1c99214da301c1e831c6711505f/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2002}, ee = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2002.994971}, interhash = {62919f26d438ca6d72e9b9daeae6f75d}, intrahash = {f488f1c99214da301c1e831c6711505f}, isbn = {0-7695-1299-2}, keywords = {dblp}, pages = {511-516}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T11:08:36.000+0100}, title = {Constraint Driven Pin Mapping for Concurrent SOC Testing.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2002.html#HuangMTSZZCR02}, year = 2002 }