%0 Journal Article %1 journals/tvlsi/RabBT14 %A Rab, Muhammad Tauseef %A Bawa, Asad Amin %A Touba, Nur A. %D 2014 %J IEEE Trans. VLSI Syst. %K dblp %N 9 %P 2017-2024 %T Reducing Cost of Yield Enhancement in 3-D Stacked Memories Via Asymmetric Layer Repair Capability. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#RabBT14 %V 22

@article{journals/tvlsi/RabBT14, added-at = {2014-10-08T00:00:00.000+0200}, author = {Rab, Muhammad Tauseef and Bawa, Asad Amin and Touba, Nur A.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2b8bb2251f27256917b31c0edc46165b5/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2013.2280593}, interhash = {313680a3f5105b65cbf7c2be28dbdab8}, intrahash = {b8bb2251f27256917b31c0edc46165b5}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 9, pages = {2017-2024}, timestamp = {2016-02-02T02:12:50.000+0100}, title = {Reducing Cost of Yield Enhancement in 3-D Stacked Memories Via Asymmetric Layer Repair Capability.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#RabBT14}, volume = 22, year = 2014 }