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Disambiguation of "Touba, Nur A."

Author of the publication

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Reducing Cost of Yield Enhancement in 3-D Stacked Memories Via Asymmetric Layer Repair Capability.

, , and . IEEE Trans. VLSI Syst., 22 (9): 2017-2024 (2014)

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A. Laukemann

apl. Prof. Dr. -Ing. Ulf Nürnberger University of Stuttgart

A. Laukemann

A. Laukemann

A. Vo{\ss}

 

Other publications of authors with the same name

Reducing Test Power During Test Using Programmable Scan Chain Disable., and . DELTA, page 159-166. IEEE Computer Society, (2002)Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits., , , and . IOLTS, page 35-. IEEE Computer Society, (2003)A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL., , and . ISCAS (1), page 577-580. IEEE, (2002)Relating entropy theory to test data compression., and . European Test Symposium, page 94-99. IEEE Computer Society, (2004)Scan-Based BIST Diagnosis Using an Embedded Processor., and . DFT, page 209-216. IEEE Computer Society, (2003)Partial Error Masking to Reduce Soft Error Failure Rate in Logic Circuits., and . DFT, page 433-. IEEE Computer Society, (2003)Logic synthesis of multilevel circuits with concurrent error detection., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (7): 783-789 (1997)Circular BIST with state skipping.. IEEE Trans. VLSI Syst., 10 (5): 668-672 (2002)Guest Editorial., , and . J. Electronic Testing, 24 (1-3): 9-10 (2008)Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes., and . J. Electronic Testing, 15 (1-2): 145-155 (1999)