%0 Journal Article %1 journals/tvlsi/QaziTDSC13 %A Qazi, Masood %A Tikekar, Mehul %A Dolecek, Lara %A Shah, Devavrat %A Chandrakasan, Anantha P. %D 2013 %J IEEE Trans. VLSI Syst. %K dblp %N 8 %P 1558-1562 %T Technique for Efficient Evaluation of SRAM Timing Failure. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi21.html#QaziTDSC13 %V 21

@article{journals/tvlsi/QaziTDSC13, added-at = {2013-08-23T00:00:00.000+0200}, author = {Qazi, Masood and Tikekar, Mehul and Dolecek, Lara and Shah, Devavrat and Chandrakasan, Anantha P.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/21805e2c6639066fea2dc30fa25f45419/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2012.2212254}, interhash = {221f6dd1414da06fe641b7b29f19b739}, intrahash = {1805e2c6639066fea2dc30fa25f45419}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 8, pages = {1558-1562}, timestamp = {2016-02-02T02:12:46.000+0100}, title = {Technique for Efficient Evaluation of SRAM Timing Failure.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi21.html#QaziTDSC13}, volume = 21, year = 2013 }