%0 Book Section %1 series/icas/TikekarHJSC14 %A Tikekar, Mehul %A Huang, Chao-Tsung %A Juvekar, Chiraag %A Sze, Vivienne %A Chandrakasan, Anantha %B High Efficiency Video Coding %D 2014 %E Sze, Vivienne %E Budagavi, Madhukar %E Sullivan, Gary J. %I Springer %K dblp %P 303-341 %T Decoder Hardware Architecture for HEVC. %U http://dblp.uni-trier.de/db/series/icas/SBS2014.html#TikekarHJSC14 %@ 978-3-319-06895-4

@incollection{series/icas/TikekarHJSC14, added-at = {2019-05-06T00:00:00.000+0200}, author = {Tikekar, Mehul and Huang, Chao-Tsung and Juvekar, Chiraag and Sze, Vivienne and Chandrakasan, Anantha}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/230d839ed36fa63b52fe9c07905ffc853/dblp}, booktitle = {High Efficiency Video Coding}, crossref = {series/icas/2014SBS}, editor = {Sze, Vivienne and Budagavi, Madhukar and Sullivan, Gary J.}, ee = {https://doi.org/10.1007/978-3-319-06895-4_10}, interhash = {0f0469d57e4969fcfdc152e9d9246de8}, intrahash = {30d839ed36fa63b52fe9c07905ffc853}, isbn = {978-3-319-06895-4}, keywords = {dblp}, pages = {303-341}, publisher = {Springer}, series = {Integrated Circuits and Systems}, timestamp = {2019-09-27T12:20:56.000+0200}, title = {Decoder Hardware Architecture for HEVC.}, url = {http://dblp.uni-trier.de/db/series/icas/SBS2014.html#TikekarHJSC14}, year = 2014 }