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FPGA and GPU implementation of large scale SpMV.

Y. Shan, T. Wu, Y. Wang, B. Wang, Z. Wang, N. Xu, and H. Yang. SASP, page 64-70. IEEE Computer Society, (2010)

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Yi Wang University of Stuttgart

Seda Yilmaz University of Stuttgart

Kerthana Shanmugam Dorairaj University of Stuttgart

Emre Baris Yildiz University of Stuttgart

Zeynep Hazal Yilmaz University of Stuttgart

Other publications of authors with the same name

New substrate-triggered ESD protection structures in a 0.18-µm CMOS process without extra mask.Y. Shan, J. He, and W. Huang. Microelectronics Reliability, 49 (1): 17-25 (2009)Memristor-based approximated computation.B. Li, Y. Shan, M. Hu, Y. Wang, Y. Chen, and H. Yang. ISLPED, page 242-247. IEEE, (2013)Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis.D. Wu, T. Wu, Y. Shan, Y. Wang, Y. He, N. Xu, and H. Yang. ICPADS, page 593-600. IEEE Computer Society, (2010)FPGA based memory efficient high resolution stereo vision system for video tolling.Y. Shan, Z. Wang, W. Wang, Y. Hao, Y. Wang, K. Tsoi, W. Luk, and H. Yang. FPT, page 29-32. IEEE, (2012)Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region.Y. Shan, Y. Hao, W. Wang, Y. Wang, X. Chen, H. Yang, and W. Luk. ACM Trans. Embedded Comput. Syst., 13 (4s): 132:1-132:24 (2014)Semantic Keyword Search on Large-Scale Semi-Structured Data.Y. Shan. Arizona State University, Tempe, USA, (2016)base-search.net (ftarizonastateun:item:40798).FPMR: MapReduce framework on FPGA.Y. Shan, B. Wang, J. Yan, Y. Wang, N. Xu, and H. Yang. FPGA, page 93-102. ACM, (2010)Real-Time Object Detection and Semantic Segmentation Hardware System with Deep Learning Networks.S. Fang, L. Tian, J. Wang, S. Liang, D. Xie, Z. Chen, L. Sui, Q. Yu, X. Sun, Y. Shan and 1 other author(s). FPT, page 389-392. IEEE, (2018)Scalable Query Optimization for Efficient Data Processing Using MapReduce.Y. Shan, and Y. Chen. BigData Congress, page 649-652. IEEE Computer Society, (2015)FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations.W. Wu, Y. Shan, X. Chen, Y. Wang, and H. Yang. ARC, volume 6578 of Lecture Notes in Computer Science, page 302-315. Springer, (2011)

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Disambiguation of "Shan, Yi"

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FPGA and GPU implementation of large scale SpMV.

Please choose a person to relate this publication to

Yi Wang University of Stuttgart

Seda Yilmaz University of Stuttgart

Kerthana Shanmugam Dorairaj University of Stuttgart

Emre Baris Yildiz University of Stuttgart

Zeynep Hazal Yilmaz University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Shan, Yi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FPGA and GPU implementation of large scale SpMV.

Please choose a person to relate this publication to

Yi Wang University of Stuttgart

Seda Yilmaz University of Stuttgart

Kerthana Shanmugam Dorairaj University of Stuttgart

Emre Baris Yildiz University of Stuttgart

Zeynep Hazal Yilmaz University of Stuttgart

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
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FPGA and GPU implementation of large scale SpMV.