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Disambiguation of "Maestro, Juan Antonio"

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Structural DMR: A Technique for Implementation of Soft-Error-Tolerant FIR Filters.

, , and . IEEE Trans. on Circuits and Systems, 58-II (8): 512-516 (2011)

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Antonio Raiolo University of Stuttgart

Juan Vargas University of Stuttgart

Giuliano Antonio Giacoppo University of Stuttgart

Jose Juan Jeronimo Rendon University of Stuttgart

Ph. D. Juan Esteban Martinez Jaramillo University of Stuttgart

 

Other publications of authors with the same name

Implementing triple adjacent Error Correction in double error correction Orthogonal Latin Squares Codes., , , , , and . DFTS, page 167-171. IEEE Computer Society, (2013)A method to protect Bloom filters from soft errors., , , and . DFTS, page 80-84. IEEE Computer Society, (2015)Using Single Error Correction Codes to Protect Against Isolated Defects and Soft Errors., , and . IEEE Trans. Reliability, 62 (1): 238-243 (2013)Combined SEU and SEFI Protection for Memories Using Orthogonal Latin Square Codes., , and . IEEE Trans. on Circuits and Systems, 63-I (11): 1933-1943 (2016)Unequal Error Protection Codes Derived from Double Error Correction Orthogonal Latin Square Codes., , and . IEEE Trans. Computers, 65 (9): 2932-2938 (2016)DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs., , , , and . Microelectronics Reliability, (2016)Protection Scheme for Star Tracker Images., , , and . IEEE Trans. Aerospace and Electronic Systems, 55 (1): 486-492 (2019)Optimizing the Implementation of SEC-DAEC Codes in FPGAs., , and . IEEE Trans. VLSI Syst., 24 (12): 3538-3542 (2016)An Efficient Fault-Tolerance Design for Integer Parallel Matrix-Vector Multiplications., , , , and . IEEE Trans. VLSI Syst., 26 (1): 211-215 (2018)A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection., , and . IEEE Trans. on Circuits and Systems, 65-II (3): 376-380 (2018)