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BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS.

, , , , and . IEEE Micro, 39 (2): 52-60 (2019)

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A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI., , , , , , , , , and 9 other author(s). VLSIC, page 316-. IEEE, (2015)A view of the parallel computing landscape., , , , , , , , , and 2 other author(s). Commun. ACM, 52 (10): 56-67 (2009)Keystone: A Framework for Architecting TEEs., , , , and . CoRR, (2019)Distributed-Memory Breadth-First Search on Massive Graphs., , , , and . CoRR, (2017)Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks., , and . ISCA, page 89-100. IEEE Computer Society, (2008)The Vector-Thread Architecture., , , , , , and . ISCA, page 52-63. IEEE Computer Society, (2004)Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM., , , , , and . ESSDERC, page 98-101. IEEE, (2014)Transactors for parallel hardware and software co-design.. HLDVT, page 140-142. IEEE Computer Society, (2007)Using PHiPAC to speed error back-propagation learning., , , and . ICASSP, page 4153-4156. IEEE Computer Society, (1997)Real-time Musical Applications on an Experimental Operating System for Multi-Core Processors., , , , , , , and . ICMC, Michigan Publishing, (2011)