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RAMP: Research Accelerator for Multiple Processors., , , , , , , and . IEEE Micro, 27 (2): 46-57 (2007)The Effects of Datapath Placement and C-Slow Retiming on Three Computational Benchmarks., and . FCCM, page 303-. IEEE Computer Society, (2002)Reconfigurable computing in the era of post-silicon scaling panel discussion., , , , , , and . FCCM, IEEE Computer Society, (2013)Datapath-oriented FPGA mapping and placement for configurable computing., and . FCCM, page 234-235. IEEE Computer Society, (1997)Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs., , , , , , , , , and 1 other author(s). CoRR, (2018)The Swarm at the Edge of the Cloud., , , , , , , , , and 12 other author(s). IEEE Design & Test, 31 (3): 8-20 (2014)The design of a neuro-microprocessor., , and . IEEE Trans. Neural Networks, 4 (3): 394-399 (1993)Stochastic, spatial routing for hypergraphs, trees, and meshes., , and . FPGA, page 78-87. ACM, (2003)Should the academic community launch an open-source FPGA device and tools effort?: evening panel.. FPGA, page 3-4. ACM, (2011)OLAF'17: Third International Workshop on Overlay Architectures for FPGAs., and . FPGA, page 1. ACM, (2017)