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A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance.

, , , , , , and . CICC, page 1-4. IEEE, (2015)

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An efficient ΔΣ ADC architecture for low oversampling ratios., and . IEEE Trans. on Circuits and Systems, 51-I (1): 63-71 (2004)Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays., , , and . IEEE Trans. on Circuits and Systems, 62-I (2): 376-384 (2015)Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay., , and . IEEE Trans. on Circuits and Systems, 58-I (7): 1518-1530 (2011)Multi-channel mixed-signal noise source with applications to stochastic equalization., , , and . ISCAS, page 2497-2500. IEEE, (2012)A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR., , , , , , and . ISSCC, page 494-495. IEEE, (2008)A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance., , , , , , and . CICC, page 1-4. IEEE, (2015)An 8.1 mW, 82 dB delta-sigma ADC with 1.9 MHz BW and -98 dB THD., , and . CICC, page 93-96. IEEE, (2008)Efficient fully-floating double-sampling integrator for DeltaSigma ADCs., , and . ISCAS, page 1440-1443. IEEE, (2008)High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters., , , , and . ISCAS, page 345-348. IEEE, (1994)A new zero-optimization scheme for noise-coupled ΔΣ ADCs., , and . ISCAS, page 2163-2166. IEEE, (2010)