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Disambiguation of "Hanumolu, Pavan Kumar"

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Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay.

, , and . IEEE Trans. on Circuits and Systems, 58-I (7): 1518-1530 (2011)

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Pavan Kumar Dasari University of Stuttgart

Pavan Venkiteswaran University of Stuttgart

Manish Kumar University of Stuttgart

Shreya Kumar University of Stuttgart

Tarun Kumar Mitruka Vinod Kumar Mitruka University of Stuttgart

 

Other publications of authors with the same name

Sensitivity Analysis for Oscillators., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (9): 1521-1534 (2008)High Frequency Buck Converter Design Using Time-Based Control Techniques., , , , , , , , and . J. Solid-State Circuits, 50 (4): 990-1001 (2015)A 4-Phase 30-70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator., , , , and . J. Solid-State Circuits, 50 (12): 2814-2824 (2015)A 1.2-A Buck-Boost LED Driver With On-Chip Error Averaged SenseFET-Based Current Sensing Technique., , , , , , and . J. Solid-State Circuits, 46 (12): 2772-2783 (2011)Analog Filter Design Using Ring Oscillator Integrators., , and . J. Solid-State Circuits, 47 (12): 3120-3129 (2012)Design and Analysis of Noise Tolerant Ring Oscillators Using Maneatis Delay Cells., , , , and . ICECS, page 494-497. IEEE, (2007)10.7 A 6.75-to-8.25GHz 2.25mW 190fsrms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOS., , , and . ISSCC, page 1-3. IEEE, (2015)A 13b 315fsrms 2mW 500MS/s 1MHz bandwidth highly digital time-to-digital converter using switched ring oscillators., , , and . ISSCC, page 464-466. IEEE, (2012)A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS., , and . ISSCC, page 360-362. IEEE, (2012)A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer., , , , , , and . ISSCC, page 152-154. IEEE, (2012)