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Disambiguation of "Pamarti, Sudhakar"

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Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only).

, , , , , , and . FPGA, page 276. ACM, (2015)

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A Spur-Free MASH DDSM With High-Order Filtered Dither., , and . IEEE Trans. on Circuits and Systems, 58-II (9): 585-589 (2011)A temperature-to-digital converter for a MEMS-based programmable oscillator with better than ±0.5ppm frequency stability., , , , , , , , , and 3 other author(s). ISSCC, page 206-208. IEEE, (2012)A 3×3.8Gb/s four-wire high speed I/O link based on CDMA-like crosstalk cancellation., , and . CICC, page 121-124. IEEE, (2009)Errata for "Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor"., and . J. Solid-State Circuits, 53 (9): 2733 (2018)Mitigating Timing Errors in Time-Interleaved ADCs: a signal conditioning approach, and . CoRR, (2012)Clock/Frequency Generation Circuits and Systems., , , , and . J. Electrical and Computer Engineering, (2012)Worst case timing jitter and amplitude noise in differential signaling., , , , and . ISQED, page 40-46. IEEE Computer Society, (2009)Mismatch Shaping Techniques to Linearize Charge Pump Errors in Fractional-N PLLs., and . IEEE Trans. on Circuits and Systems, 57-I (6): 1221-1230 (2010)A Spur Elimination Technique for Phase Interpolation-Based Fractional-N PLLs., and . IEEE Trans. on Circuits and Systems, 55-I (6): 1639-1647 (2008)A Digital Envelope Combiner for Switching Power Amplifier Linearization., and . IEEE Trans. on Circuits and Systems, 57-II (4): 270-274 (2010)