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Disambiguation of "Kong, Zhi-Hui"

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A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing.

, , , and . IEEE Trans. VLSI Syst., 21 (1): 151-156 (2013)

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Univ. -Prof. Dr. Johan Alexander Huisman University of Stuttgart

 

Other publications of authors with the same name

Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing., , , , and . IEEE Trans. VLSI Syst., 18 (8): 1225-1229 (2010)A 16Kb 10T-SRAM with 4x read-power reduction., and . ISCAS, page 3485-3488. IEEE, (2010)A low-power CAM with efficient power and delay trade-off., , , and . ISCAS, page 2573-2576. IEEE, (2011)Optimizating Emerging Nonvolatile Memories for Dual-Mode Applications: Data Storage and Key Generator., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (7): 1176-1187 (2015)An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI., , , and . J. Solid-State Circuits, 54 (7): 2091-2101 (2019)A High-Efficiency 6.78-MHz Full Active Rectifier With Adaptive Time Delay Control for Wireless Power Transmission., , and . IEEE Trans. VLSI Syst., 25 (4): 1297-1306 (2017)A new match line sensing technique in Content Addressable Memory., , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2011)Body-bootstrapped-buffer circuit for CMOS static power reduction., , , , and . APCCAS, page 842-845. IEEE, (2008)NBTI/PBTI-Aware WWL Voltage Control for Half-Selected Cell Stability Improvement., , , and . IEEE Trans. on Circuits and Systems, 60-II (9): 602-606 (2013)Design and Sensitivity Analysis of a New Current-Mode Sense Amplifier for Low-Power SRAM., , , and . IEEE Trans. VLSI Syst., 19 (2): 196-204 (2011)