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Disambiguation of "Tehranipoor, Mark"

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Defense-in-Depth: A Recipe for Logic Locking to Prevail.

, , , , , , , , and . CoRR, (2019)

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Mark Burkhardt University of Stuttgart

Dr. Mark Hamilton University of Stuttgart

Mark Kurcsics University of Stuttgart

Dr. rer. nat. habil. Frederik Marks University of Stuttgart

Ph. D. Mark Ringenberg University of Stuttgart

 

Other publications of authors with the same name

Test-point insertion efficiency analysis for LBIST applications., , , , and . VTS, page 1-6. IEEE Computer Society, (2016)An On-Chip Dynamically Obfuscated Wrapper for Protecting Supply Chain Against IP and IC Piracies., , , and . IEEE Trans. VLSI Syst., 26 (11): 2456-2469 (2018)Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation., , , , , and . J. Hardware and Systems Security, 1 (2): 137-155 (2017)The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes., , , , and . IACR Cryptology ePrint Archive, (2019)ReSC: RFID-Enabled Supply Chain Management and Traceability for Network Devices., , and . RFIDSec, volume 9440 of Lecture Notes in Computer Science, page 32-49. Springer, (2015)RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions., , , , and . FDTC, page 48-55. IEEE, (2019)Detecting Hardware Trojans Inserted by Untrusted Foundry Using Physical Inspection and Advanced Image Processing., , , , , and . J. Hardware and Systems Security, 2 (4): 333-344 (2018)Chip-level anti-reverse engineering using transformable interconnects., , , , , and . DFTS, page 109-114. IEEE Computer Society, (2015)Security validation in IoT space., , , and . VTS, page 1. IEEE Computer Society, (2016)BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning., , , , , and . ITC, page 1-10. IEEE, (2016)