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Disambiguation of "Farahmandi, Farimah"

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Defense-in-Depth: A Recipe for Logic Locking to Prevail.

, , , , , , , , and . CoRR, (2019)

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Other publications of authors with the same name

A new structure for interconnect offline testing., , , , and . EWDTS, page 1-5. IEEE Computer Society, (2013)POCA: First Power-on Chip Authentication in Untrusted Foundry and Assembly., , , , , , and . HOST, page 124-135. IEEE, (2021)Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits., and . IEEE Trans. Computers, 68 (2): 182-197 (2019)Quantifiable Assurance: From IPs to Platforms., , , , , , , , , and 2 other author(s). IACR Cryptol. ePrint Arch., (2021)Automated test generation for Debugging arithmetic circuits., and . DATE, page 1351-1356. IEEE, (2016)Defense-in-Depth: A Recipe for Logic Locking to Prevail., , , , , , , , and . CoRR, (2019)SoFI: Security Property-Driven Vulnerability Assessments of ICs Against Fault-Injection Attacks., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (3): 452-465 (2022)Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs., , , , , , , and . IACR Cryptol. ePrint Arch., (2022)Security-Aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (6): 1003-1016 (2019)Effective Combination of Algebraic Techniques and Decision Diagrams to Formally Verify Large Arithmetic Circuits., , and . ISVLSI, page 338-343. IEEE Computer Society, (2014)