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Disambiguation of "Ikeuchi, Katsuyuki"

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Capacitively coupled non-contact probing circuits for membrane-based wafer-level simultaneous testing.

, , , , , , , , , , and . ISSCC, page 144-145. IEEE, (2010)

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Switched Resonant Clocking (SRC) scheme enabling dynamic frequency scaling and low-speed test., , , , and . CICC, page 33-36. IEEE, (2009)Through Silicon Capacitive Coupling (TSCC) interface for 3D stacked dies., , and . 3DIC, page 1-5. IEEE, (2011)Capacitively coupled non-contact probing circuits for membrane-based wafer-level simultaneous testing., , , , , , , , , and 1 other author(s). ISSCC, page 144-145. IEEE, (2010)An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer., , , , , , , , , and 18 other author(s). J. Solid-State Circuits, 53 (12): 3688-3699 (2018)Startup Techniques for 95 mV Step-Up Converter by Capacitor Pass-On Scheme and VTH-Tuned Oscillator With Fixed Charge Programming., , , , , , , , and . J. Solid-State Circuits, 47 (5): 1252-1260 (2012)Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level Simultaneous Testing., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 46 (10): 2386-2395 (2011)A high-speed, low-power capacitive-coupling transceiver for wireless wafer-level testing systems., , , , and . 3DIC, page 1-4. IEEE, (2010)Reduction of minimum operating voltage (VDDmin) of CMOS logic circuits with post-fabrication automatically selective charge injection., , , , and . ISLPED, page 175-180. IEEE/ACM, (2011)A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme., , , , , , , , and . ISSCC, page 216-218. IEEE, (2011)Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits., , , , , , , , and . IEEE Trans. on Circuits and Systems, 58-II (5): 294-298 (2011)