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A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores.

J. Wang, Y. Tim, W. Wong, Z. Ong, Z. Sun, and H. Li. ASP-DAC, page 610-615. IEEE, (2014)

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Dr. -Ing. Tobias Haist University of Stuttgart

„BaKaRoS“ : ein Baukastensystem für einen niederschwelligen Zugang zur technischen OptikS. Lotz, C. Reichert, T. Haist, and A. Herkommer. DGaO-Proceedings, page P20. Ilmenau, Deutsche Gesellschaft für angewandte Optik e.V., (2018)Charakterisierung von Homogenisierkomponenten für die satellitengestützte Messung von TreibhausgasenS. Amann, T. Haist, and B. Sierk. DGaO-Proceedings, page P7. Ilmenau, Deutsche Gesellschaft für angewandte Optik e.V., (2019)

M.Sc. Yunxuan Li University of Stuttgart

Yu Li University of Stuttgart

Sören Hain University of Stuttgart

Richard Haidl University of Stuttgart

Other publications of authors with the same name

Design Margin Exploration of Spin-Transfer Torque RAM (STT-RAM) in Scaled Technologies.Y. Chen, X. Wang, H. Li, H. Xi, Y. Yan, and W. Zhu. IEEE Trans. VLSI Syst., 18 (12): 1724-1734 (2010)Fractional anisotropy asymmetry and the side of seizure origin for partial onset-temporal lobe epilepsy.H. Li, Z. Xue, M. Dulay, A. Verma, C. Karmonik, R. Grossman, and S. Wong. Comp. Med. Imag. and Graph., 38 (6): 481-489 (2014)Analyzing grey matter diffusivity of autism in the context of white matter connectivity.H. Li, Z. Xue, T. Ellmore, R. Frye, and S. Wong. ISBI, page 1150-1153. (2013)STT-RAM designs supporting dual-port accesses.X. Bi, M. Weldon, and H. Li. DATE, page 853-858. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Giant spin hall effect (GSHE) logic design for low power application.Y. Zhang, B. Yan, W. Wu, H. Li, and Y. Chen. DATE, page 1000-1005. ACM, (2015)Fine-grained dynamic voltage scaling on OLED display.X. Chen, J. Zheng, Y. Chen, W. Zhang, and H. Li. ASP-DAC, page 807-812. IEEE, (2012)Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM).Y. Chen, X. Wang, H. Li, H. Liu, and D. Dimitrov. ISQED, page 684-690. IEEE Computer Society, (2008)Scalability of PCMO-based resistive switch device in DSM technologies.Y. Chen, W. Tian, H. Li, X. Wang, and W. Zhu. ISQED, page 327-332. IEEE, (2010)Identification of faulty DTI-based sub-networks in autism using network regularized SVM.H. Li, Z. Xue, T. Ellmore, R. Frye, and S. Wong. ISBI, page 550-553. IEEE, (2012)A novel multi-feature fusion and sparse coding-based framework for image retrieval.Q. Chen, Y. Ding, H. Li, X. Wang, J. Wang, and X. Deng. SMC, page 2391-2396. IEEE, (2014)

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Disambiguation of "Li, Hai"

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A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores.

Please choose a person to relate this publication to

Dr. -Ing. Tobias Haist University of Stuttgart

M.Sc. Yunxuan Li University of Stuttgart

Yu Li University of Stuttgart

Sören Hain University of Stuttgart

Richard Haidl University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Li, Hai"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores.

Please choose a person to relate this publication to

Dr. -Ing. Tobias Haist University of Stuttgart

M.Sc. Yunxuan Li University of Stuttgart

Yu Li University of Stuttgart

Sören Hain University of Stuttgart

Richard Haidl University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores.