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Disambiguation of "Tenhunen, Hannu"

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A DSL for the SegBus platform.

, , , and . SoCC, page 393-398. IEEE, (2009)

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Other publications of authors with the same name

Path-Based Partitioning Methods for 3D Networks-on-Chip with Minimal Adaptive Routing., , , , , and . IEEE Trans. Computers, 63 (3): 718-733 (2014)Skewing-based method for reduction of functional crosstalk and power supply noise caused by on-chip buses., , and . IET Computers & Digital Techniques, 6 (2): 114-124 (2012)Power-Supply and Substrate-Noise-Induced Timing Jitter in Nonoverlapping Clock Generation Circuits., , and . IEEE Trans. on Circuits and Systems, 55-I (4): 1041-1054 (2008)Private reliability environments for efficient fault-tolerance in CGRAs., , , , , and . Design Autom. for Emb. Sys., 18 (3-4): 295-327 (2014)Fuzzy-based Adaptive Routing Algorithm for Networks-on-Chip., , and . Journal of Systems Architecture - Embedded Systems Design, 59 (7): 516-527 (2013)Special issue on networks on chip., , and . Journal of Systems Architecture, 50 (2-3): 61-63 (2004)Optimal placement of vertical connections in 3D Network-on-Chip., , , , , and . Journal of Systems Architecture - Embedded Systems Design, 59 (7): 441-454 (2013)PDNOC: Partially diagonal network-on-chip for high efficiency multicore systems., , , , and . Concurrency and Computation: Practice and Experience, 27 (4): 1054-1067 (2015)Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes., , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-A): 811-822 (2013)Efficient congestion-aware selection method for on-chip networks., , , , and . ReCoSoC, page 1-4. IEEE, (2011)