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Length matching in detailed routing for analog and mixed signal circuits., , , , and . Microelectronics Journal, 45 (6): 604-612 (2014)CMP-aware Maze Routing Algorithm for Yield Enhancement., , and . ISVLSI, page 239-244. IEEE Computer Society, (2007)Slicing Floorplans with Handling Symmetry and General Placement Constraints., , and . ISVLSI, page 112-117. IEEE Computer Society, (2014)Revisiting the linear programming framework for leakage power vs. performance optimization., , and . ISQED, page 127-134. IEEE Computer Society, (2009)SIAR: Customized real-time interactive router for analog circuits., , , , and . Integration, (2015)Fast and scalable parallel layout decomposition in double patterning lithography., , , , and . Integration, 47 (2): 175-183 (2014)Efficient range pattern matching algorithm for process-hotspot detection., , , , , and . IET Circuits, Devices & Systems, 2 (1): 2-15 (2008)Analog routing considering min-area constraint., , , and . ASICON, page 1-4. IEEE, (2013)Hamming-distance-based valve-switching optimization for control-layer multiplexing in flow-based microfluidic biochips., , , , , , and . ASP-DAC, page 524-529. IEEE, (2017)Layout decomposition for double patterning lithography., , , and . ICCAD, page 465-472. IEEE Computer Society, (2008)