Author of the publication

Mechanisms of spontaneous recovery in positive gate bias stressed power VDMOSFETs.

, , , , , , and . Microelectronics Reliability, 42 (9-11): 1465-1468 (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Djoric-Veljkovic, Snezana
add a person with the name Djoric-Veljkovic, Snezana
 

Other publications of authors with the same name

NBTI related degradation and lifetime estimation in p-channel power VDMOSFETs under the static and pulsed NBT stress conditions., , , , , , , and . Microelectronics Reliability, 51 (9-11): 1540-1543 (2011)Mechanisms of spontaneous recovery in positive gate bias stressed power VDMOSFETs., , , , , , and . Microelectronics Reliability, 42 (9-11): 1465-1468 (2002)Effects of high electric field and elevated-temperature bias stressing on radiation response in power VDMOSFETs., , , , , and . Microelectronics Reliability, 42 (4-5): 669-677 (2002)Effects of burn-in stressing on post-irradiation annealing response of power VDMOSFETs., , , , and . Microelectronics Reliability, 43 (9-11): 1455-1460 (2003)NBT stress-induced degradation and lifetime estimation in p-channel power VDMOSFETs., , , , , and . Microelectronics Reliability, 46 (9-11): 1828-1833 (2006)NBTI and irradiation related degradation mechanisms in power VDMOS transistors., , , , , , , , and . Microelectronics Reliability, (2018)Threshold voltage instabilities in p-channel power VDMOSFETs under pulsed NBT stress., , , , , , , and . Microelectronics Reliability, 50 (9-11): 1278-1282 (2010)Effects of electrical stressing in power VDMOSFETs., , , , , , and . Microelectronics Reliability, 45 (1): 115-122 (2005)Mechanisms of spontaneous recovery in DC gate bias stressed power VDMOSFETs., , , , , and . IET Circuits, Devices & Systems, 2 (2): 213-221 (2008)Effects of low gate bias annealing in NBT stressed p-channel power VDMOSFETs., , , , , and . Microelectronics Reliability, 49 (9-11): 1003-1007 (2009)