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Disambiguation of "Awashima, Toru"

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An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor.

, , , , , and . FPT, page 163-170. IEEE, (2005)

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Other publications of authors with the same name

Stream applications on the dynamically reconfigurable processor., , , , , , , , , and 1 other author(s). FPT, page 137-144. IEEE, (2004)Optimizing time and space multiplexed computation in a dynamically reconfigurable processor., , , , , , and . FPT, page 106-111. IEEE, (2013)An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor., , , , , and . FPT, page 163-170. IEEE, (2005)Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor., , , , , , , , , and 3 other author(s). FCCM, page 328-329. IEEE Computer Society, (2004)Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor., , , , , and . ARCS Workshops, page 12-18. VDE Verlag, (2005)High-level synthesis challenges and solutions for a dynamically reconfigurable processor., , , , , and . ICCAD, page 702-708. ACM, (2006)Wire congestion aware synthesis for a dynamically reconfigurable processor., , , , and . FPT, page 300-303. IEEE, (2010)High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor., , , , and . IPSJ Trans. System LSI Design Methodology, (2010)Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor., , , , and . IEICE Transactions, 94-A (12): 2619-2627 (2011)An optimal chip compaction method based on shortest path algorithm with automatic jog insertion., , , and . ICCAD, page 162-165. IEEE Computer Society / ACM, (1992)