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Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor.

N. Suzuki, S. Kurotaki, M. Suzuki, N. Kaneko, Y. Yamada, K. Deguchi, Y. Hasegawa, H. Amano, K. Anjo, M. Motomura, K. Wakabayashi, T. Toi, and T. Awashima. FCCM, page 328-329. IEEE Computer Society, (2004)

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Other publications of authors with the same name

An FPGA Implementation of Reconfigurable Real-Time Vision Architecture.J. Hiraiwa, and H. Amano. AINA Workshops, page 150-155. IEEE Computer Society, (2013)A Preprocessing System of the EULASH: An Environment for Efficient use of Multiprocessors with Local Memory.J. Yamamoto, D. Hattori, J. ichi Yamato, T. Tokuyoshi, Y. Yamaguchi, and H. Amano. Parallel and Distributed Computing and Systems, page 68-71. IASTED/ACTA Press, (1995)Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board.A. Kitamura, Y. Miyabe, T. Izawa, T. Miyashiro, K. Watanabe, T. Otsuka, H. Amano, Y. Hamada, N. Tanabe, and H. Nakajo. PDCAT, page 778-780. IEEE Computer Society, (2005)SNAIL: A Multiprocessor Based on the Simple Serial Synchronized Multistage Interconnection Network Architecture.M. Sasahara, J. Terada, L. Zhou, K. Gaye, J. ichi Yamato, S. Ogura, and H. Amano. ICPP (1), page 117-120. CRC Press, (1994)An LSI implementation of the simple serial synchronized multistage interconnection network.T. Kamei, M. Sasahara, and H. Amano. ASP-DAC, page 673-674. IEEE, (1997)Balanced Dimension-Order Routing for k-ary n-cubes.J. Aliaga, M. Koibuchi, H. Matsutani, and H. Amano. ICPP Workshops, page 499-506. IEEE Computer Society, (2009)A Packet Forwarding Layer for DIMMnet and its Hardware Implementation.Y. Hamada, H. Nishi, A. Kitamura, N. Tanabe, H. Amano, and H. Nakajo. PDPTA, page 461-467. CSREA Press, (2005)Destination Bundle: A Routing Table Reduction Technique for Distributed Routing on Dependable Networks-on-Chips.H. Matsutani, M. Koibuchi, and H. Amano. PDPTA, page 1343-1349. CSREA Press, (2005)Implementation and Evaluation of Multicast Mechanism on Network Interface Plugged into a Memory Slot.A. Ohta, Y. Hamada, A. Kitamura, N. Tanabe, H. Amano, and H. Nakajo. PDPTA, page 787-793. CSREA Press, (2007)Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism.Y. Tanabe, T. Midorikawa, D. Shiraishi, M. Shigeno, T. Hanawa, and H. Amano. PDPTA, page 1148-1154. CSREA Press, (2003)

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Disambiguation of "Amano, Hideharu"

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Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor.

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Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor.