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Panel: New Research Problems in the Emerging Test Technology.

, , , , , , and . Asian Test Symposium, page 189-190. IEEE Computer Society, (1995)

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Acceleration of mincut partitioning using hardware CAD accelerator TP5000., , and . ASP-DAC, page 61-64. IEEE, (1997)Panel: New Research Problems in the Emerging Test Technology., , , , , , and . Asian Test Symposium, page 189-190. IEEE Computer Society, (1995)Logic Simulation System Using Simulation Processor (SP)., , , , , , , and . DAC, page 225-230. (1988)A high-speed test-generation method using a test generation circuit., , and . Systems and Computers in Japan, 21 (11): 12-20 (1990)Acceleration of behavioral simulation on simulation specific machines., , , , and . ED&TC, page 373-377. IEEE Computer Society, (1997)Efficient placement and routing techniques for master slice LSI., and . DAC, page 458-464. ACM/IEEE, (1980)Logic synthesis for a single large look-up table., , and . ICCD, page 415-424. IEEE Computer Society, (1995)An approach to verify a large scale system-on-a-chip using symbolic model checking., , , and . ICCD, page 308-313. (1998)Test pattern generation system for delay faults using a high speed simulation processor 'SP'., and . VTS, page 13-18. IEEE Computer Society, (1992)CTL model checking based on forward state traversal., , and . ICCAD, page 82-87. IEEE Computer Society / ACM, (1996)