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Disambiguation of "Hsieh, Bing-Yu"

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A CMOS SoC for 56/18/16 CD/DVD-dual/RAM applications.

, , , , , , , , , , , , , , , , , , , , and . DAC, page 290-291. ACM, (2006)

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Wei Yu University of Stuttgart

Yiwen Yuan University of Stuttgart

Xingyao Yu University of Stuttgart

Yu Li University of Stuttgart

Meral Yurdakul-Ziegler University of Stuttgart

 

Other publications of authors with the same name

Automatic threshold decision of background registration technique for video segmentation., , , and . VCIP, volume 4671 of Proceedings of SPIE, page 552-563. SPIE, (2002)Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems., , , , and . VLSI Signal Processing, 42 (3): 241-255 (2006)Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder., , , and . IEEE Trans. Circuits Syst. Video Techn., 15 (3): 378-401 (2005)Hardware architecture design for H.264/AVC intra frame coder., , , and . ISCAS (2), page 269-272. IEEE, (2004)A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE., , , and . ISSCC, page 200-201. IEEE, (2008)Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC., , , , and . IEEE Trans. on Circuits and Systems, 53-II (9): 832-836 (2006)Simple and effective algorithm for automatic tracking of a single object using a pan-tilt-zoom camera., , , and . ICME (1), page 789-792. IEEE Computer Society, (2002)Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC., , , , and . IEEE Trans. Circuits Syst. Video Techn., 16 (4): 507-522 (2006)Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264., , , and . ISCAS (2), page 796-799. IEEE, (2003)An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability., , , and . CICC, page 749-752. IEEE, (2008)