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Improving last level shared cache performance through mobile insertion policies (MIP).

P. Fidalgo, P. Prieto, V. Puente, and J. Gregorio. Parallel Computing, (2015)

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Pablo Molina Vogelsang University of Stuttgart

Juan Pablo Segovia Gutierrez University of Stuttgart

Dr. Pablo Alejandro Mora Pinto University of Stuttgart

Pablo Filipe Santana Chacon University of Stuttgart

Other publications of authors with the same name

Energy minimization at all layers of the data center: The ParaDIME project.O. Palomar, S. Rethinagiri, G. Yalcin, J. Gil, P. Prieto, E. Torrella, O. Unsal, A. Cristal, P. Felber, A. Sobe and 7 other author(s). DATE, page 684-689. IEEE, (2016)Improving last level shared cache performance through mobile insertion policies (MIP).P. Fidalgo, P. Prieto, V. Puente, and J. Gregorio. Parallel Computing, (2015)ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers.S. Rethinagiri, O. Palomar, A. Sobe, G. Yalcin, T. Knauth, J. Gil, P. Prieto, M. Schneegaß, A. Cristal, O. Unsal and 3 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 1174-1189 (2015)BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip.P. Fidalgo, P. Prieto, V. Puente, and J. Gregorio. ICCD, page 55-60. IEEE Computer Society, (2012)Design and implementation of a direct RF-to-digital UHF-TV multichannel transceiver.M. Sánchez, J. Ser, P. Prieto, and D. Dominguez. ISCAS, page 3925-3928. IEEE, (2010)TOPAZ: An Open-Source Interconnection Network Simulator for Chip Multiprocessors and Supercomputers.P. Fidalgo, P. Prieto, L. Menezo, A. Colaso, V. Puente, and J. Gregorio. NOCS, page 99-106. IEEE Computer Society, (2012)SP-NUCA: a cost effective dynamic non-uniform cache architecture.J. Merino, V. Puente, P. Prieto, and J. Gregorio. SIGARCH Computer Architecture News, 36 (2): 64-71 (2008)Architecting Racetrack Memory Preshift through Pattern-Based Prediction Mechanisms.A. Colaso, P. Prieto, P. Fidalgo, J. Gregorio, and V. Puente. IPDPS, page 273-282. IEEE, (2019)CMP off-chip bandwidth scheduling guided by instruction criticality.P. Prieto, V. Puente, and J. Gregorio. ICS, page 379-388. ACM, (2013)Spectrum Occupancy and Hidden Node Margins for Cognitive Radio Applications in the UHF Band.M. Alonso, I. Lázaro, M. Murroni, P. Angueira, M. Vélez, J. Morgade, M. Sánchez, and P. Prieto. MobiMedia, volume 79 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 84-88. Springer, (2011)

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Disambiguation of "Prieto, Pablo"

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Improving last level shared cache performance through mobile insertion policies (MIP).

Please choose a person to relate this publication to

Pablo Molina Vogelsang University of Stuttgart

Juan Pablo Segovia Gutierrez University of Stuttgart

Dr. Pablo Alejandro Mora Pinto University of Stuttgart

Pablo Filipe Santana Chacon University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Prieto, Pablo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Improving last level shared cache performance through mobile insertion policies (MIP).

Please choose a person to relate this publication to

Pablo Molina Vogelsang University of Stuttgart

Juan Pablo Segovia Gutierrez University of Stuttgart

Dr. Pablo Alejandro Mora Pinto University of Stuttgart

Pablo Filipe Santana Chacon University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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MSOffice XML

Improving last level shared cache performance through mobile insertion policies (MIP).