Author of the publication

An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster.

, , , and . J. Solid-State Circuits, 52 (1): 98-112 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems., , , , , and . ASYNC, page 181-189. IEEE Computer Society, (2002)GALS at ETH Zurich: Success or Failure., , , , and . ASYNC, page 150-159. IEEE Computer Society, (2006)Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers., , , and . ISCAS, page 2740-2743. IEEE, (2014)Design space exploration for field programmable compressor trees., , , , , , and . CASES, page 207-216. ACM, (2008)An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster., , , and . J. Solid-State Circuits, 52 (1): 98-112 (2017)GALS for Bursty Data Transfer based on Clock Coupling., , , and . Electron. Notes Theor. Comput. Sci., (2009)A near-threshold RISC-V core with DSP extensions for scalable IoT Endpoint Devices., , , , , , , , and . CoRR, (2016)An 826 MOPS, 210 uW/MHz Unum ALU in 65 nm., , , , , and . CoRR, (2017)A current sensing completion detection method for asynchronous pipelines operating in the sub-threshold regime., , and . I. J. Circuit Theory and Applications, 37 (2): 203-220 (2009)Investigating the Potential of Custom Instruction Set Extensions for SHA-3 Candidates on a 16-bit Microcontroller Architecture., , and . IACR Cryptology ePrint Archive, (2012)