Author of the publication

A 30 Gb/s/Link 2.2 Tb/s/mm 2 Inductively-Coupled Injection-Locking CDR for High-Speed DRAM Interface.

, , and . J. Solid-State Circuits, 46 (11): 2552-2559 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Circuit and package design for 44GB/s inductive-coupling DRAM/SoC interface., , , , and . ASP-DAC, page 44-45. IEEE, (2015)Design and analysis for ThruChip design for manufacturing (DFM)., , , , , and . ASP-DAC, page 46-47. IEEE, (2015)Through Chip Interface Based Three-Dimensional FPGA Architecture Exploration., , , and . IEICE Transactions, 98-C (4): 288-297 (2015)A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface., , , , , , , , , and 1 other author(s). IEEE Micro, 33 (6): 6-15 (2013)Image sensor/digital logic 3D stacked module featuring inductive coupling channels for high speed/low-noise image transfer., , , , , , , , and . VLSIC, page 82-. IEEE, (2015)Simultaneous 6-Gb/s Data and 10-mW Power Transmission Using Nested Clover Coils for Noncontact Memory Card., , , , , , and . J. Solid-State Circuits, 47 (10): 2484-2495 (2012)Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces., , , , , and . IEEE Trans. VLSI Syst., 24 (2): 493-506 (2016)A 2.7Gb/s/mm2 0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking., , , , and . ISSCC, page 490-492. IEEE, (2011)A case for wireless 3D NoCs for CMPs., , , , , , , , and . ASP-DAC, page 23-28. IEEE, (2013)CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect., , , , , , , , , and 1 other author(s). FPL, page 543-546. IEEE, (2012)