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Disambiguation of "Radetzki, Martin"

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A metamodel and semantics for transaction level modeling.

, and . FDL, page 1-8. IEEE, (2011)

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Univ. -Prof. Dr. -Ing. Martin Radetzki University of Stuttgart

Martin Baumann

Martin Schwartz University of Stuttgart

Martin Alvarez University of Stuttgart

Univ. -Prof. Martin Ostermann University of Stuttgart

 

Other publications of authors with the same name

Power Management for High-Performance Applications on Network-on-Chip-Based Multiprocessors., and . GreenCom/iThings/CPScom, page 77-85. IEEE, (2013)Efficient Fault Simulation of SystemC Designs., and . DSD, page 487-494. IEEE Computer Society, (2011)A case study on message-based discrete event simulation for Transaction Level Modeling., and . FDL, page 1-8. IEEE, (2011)A Latency, Preemption and Data Transfer Accurate Adaptive Transaction Level Model for Efficient Simulation of Pipelined Buses., and . FDL, page 37-42. IEEE, (2008)Optimal placement of vertical connections in 3D Network-on-Chip., , , , , and . Journal of Systems Architecture - Embedded Systems Design, 59 (7): 441-454 (2013)Intelligent IP retrieval driven by application requirements., , , , , and . Integration, 37 (4): 253-287 (2004)A methodology to compute long-term fault resilience of NoCs under fault-tolerant routing algorithms, and . 2019 Forum for Specification and Design Languages (FDL), Piscataway, IEEE, (2019)A Machine Learning Enabled Long-Term Performance Evaluation Framework for NoCs, , and . 2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)), page 164-171. Piscataway, IEEE, (2019)A data traffic efficient H.264 deblocking IP., and . ISCAS, page 3430-3433. IEEE, (2008)An intelligent deflection router for networks-on-chip., and . WISES, page 57-62. IEEE, (2009)