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Task-accurate performance modeling in SystemC for real-time multi-processor architectures.

, , , , , and . DATE, page 480-481. European Design and Automation Association, Leuven, Belgium, (2006)

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Mastering Software Variant Explosion for GPU Accelerators., , , , and . Euro-Par Workshops, volume 7640 of Lecture Notes in Computer Science, page 123-132. Springer, (2012)An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques (abstract only)., , and . FPGA, page 257. ACM, (2014)HW/SW Tradeoffs for Dynamic Message Scheduling in Controller Area Network (CAN)., , and . ARCS, volume 7767 of Lecture Notes in Computer Science, page 159-170. Springer, (2013)On Confident Task-Accurate Performance Estimation., , , , and . ARCS, volume 7767 of Lecture Notes in Computer Science, page 25-37. Springer, (2013)Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs., , , , , , and . ReConFig, page 1-8. IEEE, (2018)Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures., , , and . ReConFig, page 91-96. IEEE Computer Society, (2010)Towards Resource Aware Programming on Intel's Single-Chip Cloud Computer Processor., , , and . MARC Symposium, page 111-114. KIT Scientific Publishing, Karlsruhe, (2011)Efficient task spawning for shared memory and message passing in many-core architectures., , , , , , and . Journal of Systems Architecture - Embedded Systems Design, (2017)Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware., , , , , and . EURASIP J. Adv. Sig. Proc., 2003 (6): 594-602 (2003)Auto-vectorization for image processing DSLs., , , and . LCTES, page 21-30. ACM, (2017)