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Disambiguation of "Zelikson, Michael"

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On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices.

, , , , , , , , , , , , , , , and . DAC, page 724-727. ACM, (2003)

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Michael Böhm

Michael Funk

Hon. -Prof. Dr. -Ing. Michael Bauer University of Stuttgart

Dr. Michael Wachowsky University of Stuttgart

Dr. phil. Michael Nerurkar University of Stuttgart

 

Other publications of authors with the same name

Efficiency optimization of integrated DC-DC buck converters., , , and . ICECS, page 1208-1211. IEEE, (2010)8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm., , , and . ISSCC, page 1-3. IEEE, (2015)4.1 14nm 6th-generation Core processor SoC with low power consumption and improved performance., , , , , , , and . ISSCC, page 72-73. IEEE, (2016)On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices., , , , , , , , , and 6 other author(s). DAC, page 724-727. ACM, (2003)Two novel cross-cascode differential amplifiers., and . ICECS, page 13-16. IEEE, (2004)A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor., , , , , , , , and . J. Solid-State Circuits, 47 (1): 194-205 (2012)An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 Ghz) On-Chip Transmission Line Approach ., , , , , , , and . DATE, page 804-811. IEEE Computer Society, (2002)Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm., , , and . J. Solid-State Circuits, 51 (3): 752-762 (2016)