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Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive.

, , , , , and . VTS, page 66-71. IEEE Computer Society, (2006)

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Diagnostic Fail Data Minimization Using an N-Cover Algorithm., , , and . IEEE Trans. VLSI Syst., 24 (3): 1198-1202 (2016)Prioritizing the Application of DFM Guidelines Based on the Detectability of Systematic Defects., , , and . ATS, page 217-220. IEEE Computer Society, (2008)Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm., , , , , and . VTS, page 1-6. IEEE Computer Society, (2016)DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield., , , and . VLSI Design, page 14. IEEE Computer Society, (2006)Testing for systematic defects based on DFM guidelines., , , , , and . ITC, page 1-10. IEEE Computer Society, (2007)Built-in generation of functional broadside tests considering primary input constraints., , , and . ACM Great Lakes Symposium on VLSI, page 237-238. ACM, (2014)A deductive technique for diagnosis of bridging faults., and . ICCAD, page 562-567. IEEE Computer Society / ACM, (1997)Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests., , , , and . DFT, page 1-6. IEEE Computer Society, (2018)An Experimental Study of N-Detect Scan ATPG Patterns on a Processor., , , , , and . VTS, page 23-30. IEEE Computer Society, (2004)DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield.. ISQED, page 5. IEEE Computer Society, (2007)