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Disambiguation of "Chen, Deming"

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A recurrent Markov state-space generative model for sequences.

, , , and . AISTATS, volume 89 of Proceedings of Machine Learning Research, page 3070-3079. PMLR, (2019)

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Jun Chen University of Stuttgart

preCICE Distribution Version v2404.0, , , , , , , , , and 14 other author(s). Software, (2024)

Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Lu Chen University of Stuttgart

Yingxing Cheng University of Stuttgart

 

Other publications of authors with the same name

LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization., , , and . IEEE Trans. VLSI Syst., 18 (4): 564-577 (2010)Variation-Aware Placement With Multi-Cycle Statistical Timing Analysis for FPGAs., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (11): 1818-1822 (2010)Analysis of Digital Circuit Dynamic Behavior With Timed Ternary Decision Diagrams for Better-Than-Worst-Case Design., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (5): 662-675 (2012)Power modeling and characteristics of field programmable gate arrays., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 24 (11): 1712-1724 (2005)Real-time implementation and performance optimization of 3D sound localization on GPUs., , , , , , and . DATE, page 832-835. IEEE, (2012)High-level synthesis of multiple dependent CUDA kernels on FPGA., , , , and . ASP-DAC, page 305-312. IEEE, (2013)Register and thread structure optimization for GPUs., , , and . ASP-DAC, page 461-466. IEEE, (2013)Variation Aware Routing for Three-Dimensional FPGAs., , and . ISVLSI, page 298-303. IEEE Computer Society, (2009)Optimizations in GPU: Smart compilers and core-level reconfiguration.. SLIP, page 1. IEEE, (2013)High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs., , , and . ASP-DAC, page 529-534. IEEE Computer Society, (2007)