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Scheduling Concurrent Applications on a Cluster of CPU-GPU Nodes.

, , , , and . CCGRID, page 140-147. IEEE Computer Society, (2012)

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Sequential Circuits with combinational Test Generation Complexity., and . VLSI Design, page 111-117. IEEE Computer Society, (1996)HERMES: A Software Architecture for Visibility and Control in Wireless Sensor Network Deployments., , , , and . IPSN, page 395-406. IEEE Computer Society, (2008)Scheduling Concurrent Applications on a Cluster of CPU-GPU Nodes., , , , and . CCGRID, page 140-147. IEEE Computer Society, (2012)Coverage loss by using space compactors in presence of unknown values., , , , and . DATE, page 1053-1054. European Design and Automation Association, Leuven, Belgium, (2006)Partitioning and Reordering Techniques for Static Test Sequence Compaction of Sequential Circuits., and . Asian Test Symposium, page 452-457. IEEE Computer Society, (1998)Signal Transition Graph Transformations for Initializability., , , and . EDAC-ETC-EUROASIC, page 670. IEEE Computer Society, (1994)ChiYun Compact: A Novel Test Compaction Technique for Responses with Unknown Values., , , and . ICCD, page 147-152. IEEE Computer Society, (2005)Performance Analysis of Synchronized Iterative Algorithms on Multiprocessor Systems., and . IEEE Trans. Parallel Distrib. Syst., 3 (6): 739-746 (1992)Finite state machine synthesis with fault tolerant test function., , and . J. Electronic Testing, 4 (1): 57-69 (1993)An exact algorithm for selecting partial scan flip-flops., , and . J. Electronic Testing, 7 (1-2): 83-93 (1995)