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Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications., , , , , and . Signal Processing Systems, 57 (2): 263-283 (2009)Acceleration for a compiled Transaction Level Modeling simulation., , and . ICECS, page 1176-1179. IEEE, (2006)Residue to Binary Number Converters for (2n-1, 2n, 2n+1)., , and . Great Lakes Symposium on VLSI, page 174-178. IEEE Computer Society, (1998)A new efficient EDA tool design methodology., , and . ACM Trans. Embedded Comput. Syst., 5 (2): 408-430 (2006)Automating Functional Coverage Analysis Based on an Executable Specification., , , , , and . IWSOC, page 228-234. IEEE Computer Society, (2003)Transaction Level Modeling in Hardware/Software System Design using .Net Framework., , , and . CCECE, page 140-143. IEEE, (2006)MPSoC memory optimization using program transformation., , , , , and . ACM Trans. Design Autom. Electr. Syst., 12 (4): 43 (2007)Optimal design of synchronous circuits using software pipelining techniques., , , and . ACM Trans. Design Autom. Electr. Syst., 6 (4): 516-532 (2001)A test case generation tool for conformance testing of SDL systems., , , and . SDL Forum, page 405-. Elsevier, (1999)A Class of Test Generators for Built-In Testing., and . IEEE Trans. Computers, 32 (10): 957-959 (1983)