PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Evans, Adrian"

Author of the publication

copydeleteadd this publication to your clipboard
Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales.

, , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Adrian Schlottke University of Stuttgart

Adrian Barwasser University of Stuttgart

Adrian Eitle University of Stuttgart

PD Dr. -Ing. Adrian Pocanschi University of Stuttgart

Adrian Stock University of Stuttgart

 

Other publications of authors with the same name

Comprehensive Analysis of Sequential and Combinational Soft Errors in an Embedded Processor., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (10): 1586-1599 (2015)Hot topic session 4A: Reliability analysis of complex digital systems., , , , and . VTS, page 1. IEEE Computer Society, (2013)Managing SER costs of complex systems through Linear Programming., , , , and . IOLTS, page 216-219. IEEE, (2014)RIIF-2: Toward the next generation reliability information interchange format., , , , , and . IOLTS, page 173-178. IEEE, (2016)Analysis of advanced circuits for SET measurement., , , , , , , and . IRPS, page 7. IEEE, (2015)BPPT - Bulk potential protection technique for hardened sequentials., , , , , , , , , and 2 other author(s). IOLTS, page 28-32. IEEE, (2017)A Class of SEC-DED-DAEC Codes Derived From Orthogonal Latin Square Codes., , , and . IEEE Trans. VLSI Syst., 23 (5): 968-972 (2015)A call for cross-layer and cross-domain reliability analysis and management., , , and . IOLTS, page 19-22. IEEE, (2015)A Method to Design Single Error Correction Codes With Fast Decoding for a Subset of Critical Bits., , , and . IEEE Trans. on Circuits and Systems, 63-II (2): 171-175 (2016)New approaches for synthesis of redundant combinatorial logic for selective fault tolerance., , , , , , and . IOLTS, page 62-68. IEEE, (2014)