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Disambiguation of "Józwiak, Lech"

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Synthesis of XOR Storage Schemes with Different Cost for Minimization of Memory Contention.

, , and . EUROMICRO, page 1170-1177. IEEE Computer Society, (1999)

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Dr. -Ing. Armin Lechler University of Stuttgart

Dr. Carsten Lechte University of Stuttgart

 

Other publications of authors with the same name

An Efficient Heuristic Method for State Assignment of Large Sequential Machines.. Journal of Circuits, Systems, and Computers, 2 (1): 1-26 (1992)General decomposition of incompletely specified sequential machines with multi-state behavior realization., and . Journal of Systems Architecture, 50 (8): 445-492 (2004)Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures., , and . Journal of Systems Architecture, 47 (2): 137-155 (2001)Special-issue on reconfigurable systems., and . Journal of Systems Architecture, 49 (4-6): 123-125 (2003)Information-driven circuit synthesis with the pre-characterized gate libraries., , and . Journal of Systems Architecture, 51 (6-7): 405-423 (2005)Technology Library Modelling for Information-driven Circuit Synthesis., and . DSD, page 480-489. IEEE Computer Society, (2008)Quality-driven SoC architecture synthesis for embedded applications.. SoCC, page 425-426. IEEE, (2010)High-quality sub-function construction in functional decomposition based on information relationship measures., and . DATE, page 383-390. IEEE Computer Society, (2001)HW/SW architecture co-synthesis of ASIP-based MPSoCs for highly- demanding applications.. ISVLSI, page 145-146. IEEE Computer Socity, (2013)Processor architecture exploration and synthesis of massively parallel multi-processor accelerators in application to LDPC decoding., and . Microprocessors and Microsystems - Embedded Hardware Design, 38 (2): 152-169 (2014)