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Disambiguation of "Hestness, Joel"

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A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips.

, , , and . IEEE Micro, 32 (3): 17-25 (2012)

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Joel Kimmich University of Stuttgart

Dr. Soviana Joelie University of Stuttgart

 

Other publications of authors with the same name

A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior., , and . IISWC, page 150-160. IEEE Computer Society, (2014)A survey of 25 years of evaluation., and . Natural Language Engineering, 25 (6): 753-767 (2019)Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees., , , and . ISCA, page 401-412. ACM, (2011)GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors., , and . IISWC, page 87-97. IEEE Computer Society, (2015)Express Cube Topologies for on-Chip Interconnects., , , and . HPCA, page 163-174. IEEE Computer Society, (2009)Deep Learning Scaling is Predictable, Empirically., , , , , , , , and . CoRR, (2017)gem5-gpu: A Heterogeneous CPU-GPU Simulator., , , , and . IEEE Comput. Archit. Lett., 14 (1): 34-36 (2015)Convolutional Recurrent Neural Networks for Small-Footprint Keyword Spotting., , , , , , , and . INTERSPEECH, page 1606-1610. ISCA, (2017)The gem5 simulator., , , , , , , , , and 6 other author(s). SIGARCH Computer Architecture News, 39 (2): 1-7 (2011)Netrace: dependency-driven trace-based network-on-chip simulation., , and . NoCArc@MICRO, page 31-36. ACM, (2010)