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Disambiguation of "Corvino, Rosilde"

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Extending Halide to Improve Software Development for Imaging DSPs.

, , , , and . TACO, 14 (3): 21:1-21:25 (2017)

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Other publications of authors with the same name

Design Space Exploration for data-dominated image applications with non-affine array references. (Exploration de l'espace des architectures pour des systèmes de traitement d'image, analyse faite sur des blocs fondamentaux de la rétine numérique).. Joseph Fourier University, Grenoble, France, (2009)Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors., , and . DSD, page 152-155. IEEE Computer Society, (2012)Extending Halide to Improve Software Development for Imaging DSPs., , , , and . TACO, 14 (3): 21:1-21:25 (2017)Design space exploration in application-specific hardware synthesis for multiple communicating nested loops., , , and . ICSAMOS, page 128-135. IEEE, (2012)Exploring processor parallelism: Estimation methods and optimization strategies., , , and . DDECS, page 18-23. IEEE Computer Society, (2013)ASAM: Automatic architecture synthesis and application mapping., , , , , , , , , and 4 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-C): 1002-1019 (2013)Automatic generation of a parallel tile processing unit for algorithms with non-affine array references., , and . IFMT, page 11. ACM, (2008)ASAM: Automatic Architecture Synthesis and Application Mapping., , , , , , , , , and 3 other author(s). DSD, page 216-225. IEEE Computer Society, (2012)Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study., , , and . DSD, page 774-781. IEEE Computer Society, (2012)Abstract Clocks for the DSE of Data-Intensive Applications on MPSoCs., and . ISPA, page 729-736. IEEE Computer Society, (2012)