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Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design.

, , and . IEEE International Workshop on Rapid System Prototyping, page 240-243. IEEE Computer Society, (2005)

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Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design., , and . IEEE International Workshop on Rapid System Prototyping, page 240-243. IEEE Computer Society, (2005)C-based rapid prototyping for digital signal processing., , , , , and . EUSIPCO, page 1-4. IEEE, (2005)Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses., , , and . ISVLSI, page 268-269. IEEE Computer Society, (2005)A domain-specific high-level programming model., , and . Concurrency and Computation: Practice and Experience, 28 (3): 750-767 (2016)A Visual Programming Model to Implement Coarse-Grained DSP Applications on Parallel and Heterogeneous Clusters., , and . Euro-Par Workshops (1), volume 8805 of Lecture Notes in Computer Science, page 141-152. Springer, (2014)Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis., , and . IEEE Trans. VLSI Syst., 16 (11): 1454-1464 (2008)A Programming Model and a NoC-Based Architecture for Streaming Applications., , and . DSD, page 393-397. IEEE Computer Society, (2010)Task migration of DSP application specified with a DFG and implemented with the BSP computing model on a CPU-GPU cluster., , , and . DASIP, page 326-333. IEEE, (2013)Single Core SIMD Parallelization of GMM Background Subtraction Algorithm for Vehicles Detection., , , , , and . CIST, page 308-312. IEEE, (2018)SysCellC: a data-flow programming model on multi-GPU., , and . ICCS, volume 1 of Procedia Computer Science, page 1035-1044. Elsevier, (2010)