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On the feasibility of combining on-line-test and self repair for logic circuits.

, , , and . DDECS, page 187-192. IEEE Computer Society, (2013)

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Systematic generation of diagnostic software-based self-test routines for processor components., , and . ETS, page 1-6. IEEE, (2014)Redundancy evaluation process of processor components for permanent fault compensation., and . AHS, page 1-6. IEEE, (2015)On the Feasibility of Built-In Self Repair for Logic Circuits., , , and . DFT, page 316-324. IEEE Computer Society, (2011)Combining on-line fault detection and logic self repair., , and . DDECS, page 288-293. IEEE, (2012)A comprehensive software-based self-test and self-repair method for statically scheduled superscalar processors., , , , , and . LATS, page 33-38. IEEE, (2016)Effiziente Auswahl redundanter Komponenten für Prozessoren zur Kompensation permanenter Fehler.. Brandenburg University of Technology, Cottbus - Senftenberg, Germany, (2014)A multi-layer software-based fault-tolerance approach for heterogenous multi-core systems., , , , and . LATS, page 1-6. IEEE Computer Society, (2015)Towards an automatic generation of diagnostic in-field SBST for processor components., , , and . LATW, page 1-6. IEEE Computer Society, (2013)On the feasibility of combining on-line-test and self repair for logic circuits., , , and . DDECS, page 187-192. IEEE Computer Society, (2013)Combining de-stressing and self repair for long-term dependable systems., and . DDECS, page 99-104. IEEE Computer Society, (2010)