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Disambiguation of "Arcas, Oriol"

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A Low-Overhead Profiling and Visualization Framework for Hybrid Transactional Memory.

, , , , , , and . FCCM, page 1-8. IEEE Computer Society, (2012)

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Other publications of authors with the same name

Generating infrastructure for FPGA-accelerated applications., , , , and . FPL, page 1-6. IEEE, (2013)A Low-Overhead Profiling and Visualization Framework for Hybrid Transactional Memory., , , , , , and . FCCM, page 1-8. IEEE Computer Society, (2012)Resource-bounded multicore emulation using Beefarm., , , , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 36 (8): 620-631 (2012)TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System., , , , , , , and . FCCM, page 146-153. IEEE Computer Society, (2011)From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype., , , , , , , and . ARC, volume 6578 of Lecture Notes in Computer Science, page 350-362. Springer, (2011)AxleDB: A novel programmable query processing platform on FPGA., , , , and . Microprocessors and Microsystems - Embedded Hardware Design, (2017)Accelerating Hash-Based Query Processing Operations on FPGAs by a Hash Table Caching Technique., , , , and . CARLA, volume 697 of Communications in Computer and Information Science, page 131-145. (2016)Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory., , , , , , and . Computing in Science and Engineering, 18 (1): 80-87 (2016)Bluespec SystemVerilog., and . FPGAs for Software Programmers, Springer, (2016)HATCH: Hash Table Caching in Hardware for Efficient Relational Join on FPGA., , and . FCCM, page 163. IEEE Computer Society, (2015)