PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Lee, Hsien-Hsin S."

Author of the publication

copydeleteadd this publication to your clipboard
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems.

, , and . FPL, page 47-53. IEEE, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Moosung Lee University of Stuttgart

Dongwon Lee University of Stuttgart

Junghwa Lee University of Stuttgart

S. Schumann

S. Seemann

 

Other publications of authors with the same name

SHARK: Architectural support for autonomic protection against stealth by rootkit exploits., and . MICRO, page 106-116. IEEE Computer Society, (2008)CoolPression - a hybrid significance compression technique for reducing energy in caches., , and . SoCC, page 399-402. IEEE, (2004)A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches., and . ICPP, page 286-293. IEEE Computer Society, (2003)Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV., , and . IEEE Trans. VLSI Syst., 21 (1): 1-13 (2013)Reducing Cache Pollution via Dynamic Data Prefetch Filtering., and . IEEE Trans. Computers, 56 (1): 18-31 (2007)Energy-Efficient Network Memory for Ubiquitous Devices., , , , and . IEEE Micro, 23 (5): 60-70 (2003)Supporting Cache Coherence in Heterogeneous Multiprocessor Systems., , and . DATE, page 1150-1157. IEEE Computer Society, (2004)An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems., , and . FPL, page 47-53. IEEE, (2007)Thermal optimization in multi-granularity multi-core floorplanning., , , and . ASP-DAC, page 43-48. IEEE, (2009)Profile-guided microarchitectural floor planning for deep submicron processor design., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (7): 1289-1300 (2006)