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Improving ESL power models using switching activity information from timed functional models.

, , , , and . SCOPES, page 89-97. ACM, (2014)

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Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves., , , , , , , , , and . IACR Cryptology ePrint Archive, (2009)Power-efficient Instruction Encoding Optimization for Embedded Processors., , , and . VLSI Design, page 595-600. IEEE Computer Society, (2007)Efficient Implementation of Application-Aware Spinlock Control in MPSoCs., , , , , , and . IJERTCS, 4 (1): 64-84 (2013)Creation of ESL power models for communication architectures using automatic calibration., , , , , , and . DAC, page 58:1-58:58. ACM, (2013)Improving ESL power models using switching activity information from timed functional models., , , , and . SCOPES, page 89-97. ACM, (2014)Integrated Verification Approach during ADL-Driven Processor Design., , , , , and . IEEE International Workshop on Rapid System Prototyping, page 110-118. IEEE Computer Society, (2006)Application-aware spinlock control using a hardware scheduler in MPSoC platforms., , , , , , and . ISSoC, page 1-6. IEEE, (2012)Integrated verification approach during ADL-driven processor design., , , , , and . Microelectronics Journal, 40 (7): 1111-1123 (2009)Task management in MPSoCs: An ASIP approach., , , , , and . ICCAD, page 587-594. ACM, (2009)Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves., , , , , , , and . CHES, volume 5747 of Lecture Notes in Computer Science, page 254-271. Springer, (2009)