PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Burg, Andreas"

Author of the publication

copydeleteadd this publication to your clipboard
A 2 Gb/s balanced AES crypto-chip implementation.

, , , , , , and . ACM Great Lakes Symposium on VLSI, page 39-44. ACM, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Benjamin Burger University of Stuttgart

Hendrik Burghaus University of Stuttgart

Johannes Burgbacher University of Stuttgart

Jonas Christoph Burgdorf University of Stuttgart

Marius Bürger University of Stuttgart

 

Other publications of authors with the same name

Multi-core architecture design for ultra-low-power wearable health monitoring systems., , , , and . DATE, page 988-993. IEEE, (2012)Sparsity-based real-time audio restoration., , , , , and . DASIP, page 1-2. IEEE, (2012)A quality-scalable and energy-efficient approach for spectral analysis of heart rate variability., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder Case., , , , , , , , and . FCCM, page 224-231. IEEE Computer Society, (2012)FireBird: PowerPC e200 based SoC for high temperature operation., , , , , , , and . CICC, page 1-4. IEEE, (2013)Instruction Set Extensions for Cryptographic Hash Functions on a Microcontroller Architecture., , and . ASAP, page 117-124. IEEE Computer Society, (2012)Efficient vlsi implementation of reduced-state sequence estimation for wireless communications., , , and . ICASSP, page 2528-2532. IEEE, (2013)Digital synchronization for symbol-spaced IEEE802.11ad Gigabit mmWave systems., and . ICECS, page 637-640. IEEE, (2015)A Real-Time 4-Stream MIMO-OFDM Transceiver: System Design, FPGA Implementation, and Characterization., , and . IEEE Journal on Selected Areas in Communications, 26 (6): 877-889 (2008)Area- and throughput-optimized VLSI architecture of sphere decoding., , , and . VLSI-SoC, page 189-194. IEEE, (2010)