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Disambiguation of "Teich, Jürgen"

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Minimizing Scrubbing Effort through Automatic Netlist Partitioning and Floorplanning.

, , and . IPDPS Workshops, page 299-304. IEEE Computer Society, (2014)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

Improved Time Domain Simulation of Optical Multimode Intrasystem Interconnects., , , , and . DATE, page 11110-11111. IEEE Computer Society, (2003)A rule-based static dataflow clustering algorithm for efficient embedded software synthesis., , , and . DATE, page 521-526. IEEE, (2011)Multi-objective distributed run-time resource management for many-cores., , and . DATE, page 1-6. European Design and Automation Association, (2014)Uncertainty-aware reliability analysis and optimization., , , and . DATE, page 97-102. ACM, (2015)Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators., , and . FCCM, page 279-282. IEEE Computer Society, (2009)An Architecture Description Language for Massively Parallel Processor Architectures., , , , , and . MBMV, page 11-20. Fraunhofer Institut für Integrierte Schaltungen, (2006)Model-Based Representation of Schedules for Dataflow Graphs., , , and . MBMV, page 105-115. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration., , , and . FPL, page 1-8. IEEE, (2014)Symbolic inner loop parallelisation for massively parallel processor arrays., , , and . MEMOCODE, page 219-228. IEEE, (2014)Design Methodology and Run-Time Management for Predictable Many-Core Systems., , and . ISORC Workshops, page 103-110. IEEE Computer Society, (2015)