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Disambiguation of "Chen, Tung-Chien"

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Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture.

, , and . ISCAS (2), page 273-276. IEEE, (2004)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hong Chen University of Stuttgart

Tzu-Ying Chen University of Stuttgart

Replication Data for: Structural development of a novel punctually supported timber building system for multi-storey construction : Experimental Data: Tension Tests of the Edge Connection, , , , , and . Dataset, (2024)Related to: Anna Krtschil, Luis Orozco, Simon Bechert, Hans Jakob Wagner, Felix Amtsberg, Tzu-Ying Chen, Anand Shah, Achim Menges, Jan Knippers, "Structural development of a novel punctually supported timber building system for multi-storey construction", Journal of Building Engineering, Volume 58, 2022, pages 104972. doi: 10.1016/j.jobe.2022.104972.

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

 

Other publications of authors with the same name

Analysis and architecture design of variable block-size motion estimation for H.264/AVC., , , , , and . IEEE Trans. on Circuits and Systems, 53-I (3): 578-593 (2006)Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder., , , and . IEEE Trans. Circuits Syst. Video Techn., 15 (3): 378-401 (2005)Algorithm and Architecture Design of Power-Oriented H.264/AVC Baseline Profile Encoder for Portable Devices., , , , and . IEEE Trans. Circuits Syst. Video Techn., 19 (8): 1118-1128 (2009)Brain-Inspired Framework for Fusion of Multiple Depth Cues., , , , , , and . IEEE Trans. Circuits Syst. Video Techn., 23 (7): 1137-1149 (2013)Analysis and Design of On-sensor ECG Processors for Realtime Detection of Cardiac Anomalies Including VF, VT, and PVC., , , , , , , and . Signal Processing Systems, 65 (2): 275-285 (2011)Design and implementation of cubic spline interpolation for spike sorting microsystems., , , and . ICASSP, page 1641-1644. IEEE, (2011)Design and implementation of a low power spike detection processor for 128-channel spike sorting microsystem., , and . ICASSP, page 3889-3892. IEEE, (2014)Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture., , and . ISCAS (2), page 273-276. IEEE, (2004)System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint., , , , , and . ISCAS, page 1001-1004. IEEE, (2007)Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC., , , and . IEEE Trans. Circuits Syst. Video Techn., 17 (2): 242-247 (2007)