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Heracles: Fully Synthesizable Parameterized MIPS-Based Multicore System., , and . FPL, page 356-362. IEEE Computer Society, (2011)A modular digital VLSI flow for high-productivity SoC design., , , , , , , , , and 5 other author(s). DAC, page 72:1-72:6. ACM, (2018)Soft connections: addressing the hardware-design modularity problem., , , and . DAC, page 276-281. ACM, (2009)Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures., , , , , , , , , and 6 other author(s). ACM Trans. Comput. Syst., 33 (3): 10:1-10:32 (2015)TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA., , , , and . ASPLOS, page 119-133. ACM, (2017)ArMOR: defending against memory consistency model mismatches in heterogeneous architectures., , , and . ISCA, page 388-400. ACM, (2015)Triggered instructions: a control paradigm for spatially-programmed architectures., , , , , , , , , and 4 other author(s). ISCA, page 142-153. ACM, (2013)Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings., , , , and . CoRR, (2016)Design contest overview: Combined architecture for network stream categorization and intrusion detection (CANSCID)., , , , , , and . MEMOCODE, page 69-72. IEEE Computer Society, (2010)Efficient Spatial Processing Element Control via Triggered Instructions., , , , , , , , , and 4 other author(s). IEEE Micro, 34 (3): 120-137 (2014)