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Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar Architectures.

, , , and . ACM Great Lakes Symposium on VLSI, page 147-152. ACM, (2018)

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Emerging Technology-Based Design of Primitives for Hardware Security., , , , , , , , and . JETC, 13 (1): 3:1-3:19 (2016)On-Chip Analog Trojan Detection Framework for Microprocessor Trustworthiness., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (10): 1820-1830 (2019)The Old Frontier of Reverse Engineering: Netlist Partitioning., , , , , and . J. Hardware and Systems Security, 2 (3): 201-213 (2018)On the Impossibility of Approximation-Resilient Circuit Locking., , and . HOST, page 161-170. IEEE, (2019)Cyclic Obfuscation for Creating SAT-Unresolvable Circuits., , , , , and . ACM Great Lakes Symposium on VLSI, page 173-178. ACM, (2017)Enhancing Hardware Security with Emerging Transistor Technologies., , , , , and . ACM Great Lakes Symposium on VLSI, page 305-310. ACM, (2016)Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar Architectures., , , and . ACM Great Lakes Symposium on VLSI, page 147-152. ACM, (2018)R2D2: Runtime reassurance and detection of A2 Trojan., , , , , and . HOST, page 195-200. IEEE Computer Society, (2018)Leverage Emerging Technologies For DPA-Resilient Block Cipher Design., , , , and . DATE, page 1538-1543. IEEE, (2016)Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs., , , , , and . IEEE Trans. Emerging Topics Comput., 5 (3): 340-352 (2017)